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diff --git a/hw_sim/NOTES.md b/hw_sim/NOTES.md index ed5bd75..2bac023 100644 --- a/hw_sim/NOTES.md +++ b/hw_sim/NOTES.md @@ -46,3 +46,24 @@ B. Noise budget at (R_f=1k, C_f=294pF): op-amp 8.7 nV/rtHz x noise-gain peak x16 headroom needed: post-settle integration window (1/sqrt(T)), read averaging, band-limit after settle, larger VREF. Model caveats: flat op-amp noise only (no 1/f, no Johnson/DAC switch terms — order-checked small at this impedance level). + +## Stage C (toy_loop.py, 2026-07-17): SPICE-IN-THE-LOOP TRAINING — LADDER CERTIFIED +8 -> 8 tanh -> 4 toy net; EVERY MVM (forward + transpose error transport) solved by ngspice on +differential resistive columns with: per-bit ladder mismatch (fixed device), per-column offsets, +8-bit code quantization of an fp32 digital master (T64 word-streaming), and the v1.1-measured +139 uV read noise. 7,200 DC solves in 26 s. +| arm | final CE | train acc | +|---|---|---| +| ideal numpy | 0.0211 | 100% | +| behavioral non-idealities | 0.0213 | 100% | +| **SPICE-in-the-loop** | **0.0213** | **100%** | +- SPICE == behavioral to the 4th decimal in a TRAINING context => the behavioral abstraction + (exactly what the GPU trainer's fault-injection flags implement at 72M) carries circuit + authority. The fidelity ladder [SPICE constants -> behavioral at scale] is certified. +- Training THROUGH the circuit is indistinguishable from ideal at this scale — the "gradient + from a simulated circuit" convergence-curve artifact exists before any soldering. +- Session-ready claim: "we trained a network where every matrix product, including the + transpose reads, ran through a SPICE model of the exact parts on the BOM." +NEXT candidates (autonomy line): scale toy to 32x32 (overnight class); add settle-transient +into the loop (replace DC solves at the found (R_f,C_f) point) to couple timing and training; +port the ride/beta story onto the circuit noise floor (nudge amplitude sweep vs 139 uV). |