| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2026-07-17 | hw_sim: circuit-as-code workflow stood up (PySpice/ngspice/skidl); cell_v0 ↵ | Yuren Hao | |
| — 64-branch settle 1.14us (<=3us gate PASS), two-phase offset rejection x376; sync_wandb follow mode Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_014FAPDWQ49M5Ye3NpTndTpn | |||
