From 12d8f2dceb9d949d50b19190ef234dab099eed69 Mon Sep 17 00:00:00 2001 From: Yuren Hao Date: Fri, 10 Jul 2026 23:16:23 -0500 Subject: Queue: double-sided nudge after stage1b (0.22 = differential-measurement SNR tax, escalation ladder recorded) --- docs/campaign/CASCADE_ABLATION_PLAN.md | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'docs/campaign') diff --git a/docs/campaign/CASCADE_ABLATION_PLAN.md b/docs/campaign/CASCADE_ABLATION_PLAN.md index b456ccd..0560a07 100644 --- a/docs/campaign/CASCADE_ABLATION_PLAN.md +++ b/docs/campaign/CASCADE_ABLATION_PLAN.md @@ -484,3 +484,11 @@ inference is a plain forward pass.** Task #15 demo artifact exists. 3e-4 + bf_late 1e-3@15k + kretry + cosine[now also on Muon via build_hybrid total_steps]) vs stage1b_bp_muon (farm GPU6: Muon + cosine). Expectation: EP ~1.25-1.35 (Muon -0.13 and erosion fix ~-0.1+), BP+Muon anchor moves too. ~8h both. + +### QUEUE (user, 2026-07-10): double-sided nudge — implement AFTER stage1b endpoint. +The 0.22 diagnosis: EP's one extra constraint = the gradient is a DIFFERENTIAL MEASUREMENT +(SNR ∝ β|g|/(ε·σ)) vs BP's analytic adjoint. Escalation ladder: stage1b ramp (running) → +double-sided ±β (kills O(β) Taylor bias, unlocks ~10× β for SNR, 2× nudge cost; A/B at 25k-ckpt +2k-step probe when implemented) → fp64 E-accumulation / readout averaging. Analog note: this +constraint IS the hardware constraint (ε = device noise); β-scheduling learned here = chip ops +manual; hardware bonus = nudge amplitude free under multiplicative noise (r-indifference). -- cgit v1.2.3