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authorYuren Hao <yurenh2@illinois.edu>2026-07-10 23:16:23 -0500
committerYuren Hao <yurenh2@illinois.edu>2026-07-10 23:16:23 -0500
commit12d8f2dceb9d949d50b19190ef234dab099eed69 (patch)
tree95ce4861413b9edc3b589fe07a00afec19d918f1 /docs/campaign/CASCADE_ABLATION_PLAN.md
parent6d9fcd748df0836528b31f29717ac3bc8715d1dd (diff)
Queue: double-sided nudge after stage1b (0.22 = differential-measurement SNR tax, escalation ladder recorded)
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@@ -484,3 +484,11 @@ inference is a plain forward pass.** Task #15 demo artifact exists.
3e-4 + bf_late 1e-3@15k + kretry + cosine[now also on Muon via build_hybrid total_steps]) vs
stage1b_bp_muon (farm GPU6: Muon + cosine). Expectation: EP ~1.25-1.35 (Muon -0.13 and erosion fix
~-0.1+), BP+Muon anchor moves too. ~8h both.
+
+### QUEUE (user, 2026-07-10): double-sided nudge — implement AFTER stage1b endpoint.
+The 0.22 diagnosis: EP's one extra constraint = the gradient is a DIFFERENTIAL MEASUREMENT
+(SNR ∝ β|g|/(ε·σ)) vs BP's analytic adjoint. Escalation ladder: stage1b ramp (running) →
+double-sided ±β (kills O(β) Taylor bias, unlocks ~10× β for SNR, 2× nudge cost; A/B at 25k-ckpt
+2k-step probe when implemented) → fp64 E-accumulation / readout averaging. Analog note: this
+constraint IS the hardware constraint (ε = device noise); β-scheduling learned here = chip ops
+manual; hardware bonus = nudge amplitude free under multiplicative noise (r-indifference).