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| author | Yuren Hao <yurenh2@illinois.edu> | 2026-07-13 12:28:17 -0500 |
|---|---|---|
| committer | Yuren Hao <yurenh2@illinois.edu> | 2026-07-13 12:28:17 -0500 |
| commit | ac2dbc44a7c87e873290d6e97163072015f168a9 (patch) | |
| tree | 63eac5e7adfbb77859d9c91730e89171875cb742 /docs/hardware/COMPONENT_HW_MAP.md | |
| parent | 907588538ead4d005b6cf4c0fa26ac2450fa5d7e (diff) | |
18-agent adversarial substrate down-select: incumbent CONFIRMED-MODIFIED (-260), step-0 fault gates, refined partner asks
Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_014FAPDWQ49M5Ye3NpTndTpn
Diffstat (limited to 'docs/hardware/COMPONENT_HW_MAP.md')
| -rw-r--r-- | docs/hardware/COMPONENT_HW_MAP.md | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/docs/hardware/COMPONENT_HW_MAP.md b/docs/hardware/COMPONENT_HW_MAP.md index 0cae1ea..f8d9c84 100644 --- a/docs/hardware/COMPONENT_HW_MAP.md +++ b/docs/hardware/COMPONENT_HW_MAP.md @@ -58,6 +58,7 @@ Companion docs: `HW_RESEARCH_FINDINGS.md` (softmax dossier, OLMo2 analog audit, tolerances. Board-BOM class: $5–20k. - **Demo-1:** time-multiplex ONE physical trainable block through L logical positions (cascade's per-block locality makes depth a **memory line-item**, not a silicon line-item); digital-side Adam. +- **⚡ 2026-07-13: 18-agent first-principles substrate down-select COMPLETE → HW_FIRST_PRINCIPLES_SEARCH.md** (verdict: incumbent CONFIRMED-MODIFIED at $150-260; step-0 = 3 new $0 fault-injection channels GATE all purchases: replica-asymmetry 2/5/10%, Wᵀ-mismatch 0.3/1.5%, 1-LSB-quantized updates @7/8/10b; null-offset engineering = the real critical path; refined Dillavou/UIUC ask lists in §5). - **E-tier queue feeding this map:** softmax dynamic-noise cliff (cascade re-test), wq8/wq6 static quantization (cascade re-test), divider mismatch (#4/#7), Gilbert-gate mismatch (#6), RoPE phase error (#2), write pricing (#16), QK-norm vs tanh-logit-softcap A/B, error-channel SNR ledger. |