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| author | Yuren Hao <yurenh2@illinois.edu> | 2026-07-17 15:29:13 -0500 |
|---|---|---|
| committer | Yuren Hao <yurenh2@illinois.edu> | 2026-07-17 15:29:13 -0500 |
| commit | 8470a592dca83fd54f49e88c7352429e5bb0d315 (patch) | |
| tree | cb48a7998b411f004c28d582cd7e72a856ec9d67 /ep_run/resreg_warm_probe_loop.py | |
| parent | db09d8f0ca4367b424f8714ce02c85391f71d0cf (diff) | |
hw_sim: circuit-as-code workflow stood up (PySpice/ngspice/skidl); cell_v0 — 64-branch settle 1.14us (<=3us gate PASS), two-phase offset rejection x376; sync_wandb follow mode
Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_014FAPDWQ49M5Ye3NpTndTpn
Diffstat (limited to 'ep_run/resreg_warm_probe_loop.py')
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