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| author | YurenHao0426 <Blackhao0426@gmail.com> | 2026-08-06 15:59:45 -0500 |
|---|---|---|
| committer | YurenHao0426 <Blackhao0426@gmail.com> | 2026-08-06 15:59:45 -0500 |
| commit | 53f578f73929db9aaeee06ba6fe55f908e0a164f (patch) | |
| tree | dfadf1606d75dc29f3c745533d04c8687c6469e6 /HARDWARE_LOCALITY_CONTRACT.md | |
| parent | fc42f93cee71210532983a3962f1cd227f96e5f3 (diff) | |
protocol: require BP-free hardware-local debiasing
Diffstat (limited to 'HARDWARE_LOCALITY_CONTRACT.md')
| -rw-r--r-- | HARDWARE_LOCALITY_CONTRACT.md | 123 |
1 files changed, 123 insertions, 0 deletions
diff --git a/HARDWARE_LOCALITY_CONTRACT.md b/HARDWARE_LOCALITY_CONTRACT.md new file mode 100644 index 0000000..290c9f1 --- /dev/null +++ b/HARDWARE_LOCALITY_CONTRACT.md @@ -0,0 +1,123 @@ +# BP-free and hardware-locality contract + +This contract applies to every result in the active two-state structured-bias +program. A run cannot be labelled SDIL or hardware-local merely because the +mathematical rule has a local interpretation. The executable learning path +must satisfy the checks below. + +## Information available to the debiaser + +For one cell, population or physical edge, the debiaser may use only: + +- its local neutral state or fixed local basis features `phi(z_neutral)`; +- its locally observed instruction-off teaching channel `a_neutral`; +- its locally observed task-period channel `a`; +- its own predictor coefficients and locally stored traces; +- the native backbone eligibility already available at that synapse or edge; +- a local phase/neutral gate. + +The frozen learning rule is + +```text +prediction = P phi(z) +r = a - prediction +Delta w = eta_w r eligibility +Delta P = eta_P (a_neutral - P phi(z_neutral)) phi(z_neutral)^T +``` + +`P` may be an affine or fixed-basis adaptive filter. A multilayer predictor +trained by reverse-mode differentiation is outside the method. Fixed nonlinear +basis functions are allowed only when every adaptive coefficient still has the +local LMS update above. + +## Forbidden training information + +No SDIL training update may read or be derived from: + +- a task-loss gradient or hidden-state BP gradient; +- a copied clean, centered, oracle or BP update; +- a downstream weight, its transpose, or a reverse-mode computation graph; +- a task-period target for the neutral predictor; +- a global loss difference used to supervise the predictor; +- an opposite-sign phase introduced only to create a debiasing target; +- a backbone-specific learned controller trained with BP. + +BP, centered/oracle states and clean updates may be computed only in a clearly +separate diagnostic process after the learning update has already been fixed. + +## Executable audit + +Every backbone adapter must pass all of the following before a task endpoint: + +1. **No-grad training:** the SDIL update executes with autograd disabled and + no learned tensor requiring gradients. +2. **Local replay:** recording the local tuple `(z_neutral, a_neutral, z, a, + eligibility)` is sufficient to reproduce the update bitwise without the + model, label, task loss or downstream layers. +3. **Downstream independence:** after the tuple is recorded, randomizing all + downstream parameters, labels and loss code leaves the update bitwise + unchanged. +4. **Instruction isolation:** changing the task instruction while holding a + stored neutral tuple fixed cannot change the predictor update. +5. **Manual/autograd equivalence:** if an author simulator uses autograd to + evaluate a mathematically local energy derivative, a test-only comparison + must show that the hand-written local formula agrees. Paper-facing training + uses the manual path. +6. **Common-mode cancellation:** the same offset in both states cancels before + SDIL and produces no claimed gain. +7. **Phase and storage audit:** every neutral observation, state copy, + predictor coefficient, multiplication and update is counted. + +Passing these checks establishes algorithmic BP freedom and an executable +local information path. It does not by itself establish that a particular +analog circuit has sufficient precision or energy advantage. + +## Hardware primitives + +The rule requires only the following primitive operations at each adaptive +site: + +| operation | possible local realization | +|---|---| +| store `P` or a trace | capacitor, memristive state, SRAM/register | +| form `a - P phi(z)` | differential amplifier or local subtractor | +| multiply local factors | analog multiplier, coincidence circuit, local MAC | +| integrate `Delta P` and `Delta w` | capacitor current or local accumulator | +| select neutral/task observation | local phase gate or switch | + +Dillavou et al.'s coupled-learning hardware already measures local voltage +drops, forms products with AD633 analog multiplier circuitry, and integrates +updates on capacitors. Those are the needed operation classes. SDIL still adds +predictor state, a prediction path, subtraction and a neutral schedule; the +published hardware does not already implement that complete circuit. Until it +is built or circuit-simulated, the correct claim is **implementable from local +analog primitives**, not **demonstrated on hardware**. + +For EP, coupled-learning DCHNs and Dual Propagation, relaxation produces the +native local teaching/eligibility variables. The SDIL adapter operates on +those local variables and cannot ask autograd to reconstruct them. An author +implementation that calls `.backward()` for software convenience is acceptable +as a native accuracy reference, but not as the paper-facing SDIL training path +without the manual-equivalence audit. + +## Claim language + +Allowed after the executable checks: + +> SDIL is algorithmically backpropagation-free: its adaptive predictor and +> synaptic updates use local state, instruction-off measurements and native +> local eligibilities, with no task-loss reverse pass or weight transport. + +Allowed before a physical circuit demonstration: + +> The update decomposes into storage, subtraction, multiplication, integration +> and phase-gating primitives already common in analog local-learning systems. + +Not allowed without new evidence: + +- “SDIL has been demonstrated on the physical resistor hardware.” +- “SDIL requires no extra observation, state or circuit.” +- “Using autograd internally is irrelevant to the hardware claim.” +- “Every two-state backbone is BP-free because its equations can be written + locally.” + |
