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| author | YurenHao0426 <Blackhao0426@gmail.com> | 2026-08-29 16:34:19 -0500 |
|---|---|---|
| committer | YurenHao0426 <Blackhao0426@gmail.com> | 2026-08-29 16:34:19 -0500 |
| commit | 694ef40bb4dc7e16dbfcefec233055c4de396e80 (patch) | |
| tree | 7a42a455c3c31c2405cbecaf1a9036181252e3ba /experiments/spice_autozero_primitive_p8.py | |
| parent | a183793251dc38164986ea7e928d1f5ed47a5527 (diff) | |
fix: separate autozero SPICE switching phases
Diffstat (limited to 'experiments/spice_autozero_primitive_p8.py')
| -rw-r--r-- | experiments/spice_autozero_primitive_p8.py | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/experiments/spice_autozero_primitive_p8.py b/experiments/spice_autozero_primitive_p8.py index 9955543..3dec783 100644 --- a/experiments/spice_autozero_primitive_p8.py +++ b/experiments/spice_autozero_primitive_p8.py @@ -29,13 +29,15 @@ def netlist( leakage_resistance_ohm: float, ) -> str: switch_time = acquisition_seconds - transition_time = switch_time + 1.0e-9 - measurement_start = transition_time + 5.0e-9 - measurement_end = transition_time + LEARNING_WINDOW_SECONDS + switch_transition_end = switch_time + 1.0e-9 + raw_transition_start = switch_time + 10.0e-9 + raw_transition_end = switch_time + 11.0e-9 + measurement_start = switch_time + 20.0e-9 + measurement_end = measurement_start + LEARNING_WINDOW_SECONDS simulation_end = measurement_end + 1.0e-6 return f"""Hardware auto-zero primitive sanity check -Vraw raw 0 PWL(0 {OFFSET_V} {switch_time} {OFFSET_V} {transition_time} {OFFSET_V + LEARNING_SIGNAL_V} {simulation_end} {OFFSET_V + LEARNING_SIGNAL_V}) -Vsample sample 0 PWL(0 5 {switch_time} 5 {transition_time} 0 {simulation_end} 0) +Vraw raw 0 PWL(0 {OFFSET_V} {raw_transition_start} {OFFSET_V} {raw_transition_end} {OFFSET_V + LEARNING_SIGNAL_V} {simulation_end} {OFFSET_V + LEARNING_SIGNAL_V}) +Vsample sample 0 PWL(0 5 {switch_time} 5 {switch_transition_end} 0 {simulation_end} 0) Ssample raw hold sample 0 sample_switch .model sample_switch SW(Ron={switch_resistance_ohm} Roff=1e12 Vt=2.5 Vh=0.1) Chold hold 0 {hold_capacitance_f} IC=0 |