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+**Published physical structured-bias reproduction.** All panels are regenerated
+from the raw small-network files released by Dillavou et al. in Zenodo record
+`15692914` (release `v1.0.1`). **A,** Combined learning error approaches a
+nonzero low-period plateau in three physical experiments. Fits to the lowest
+six periods have log--log slopes `0.062`, `0.288`, and `-0.024`. **B,** Squared
+cycle span grows approximately quadratically with switching period over the
+same points (slopes `1.837`, `1.736`, and `1.947`; dashed lines show quadratic
+references). **C,** The resulting span-per-period proxy remains finite at
+short periods, as expected for deterministic drift that is not removed by
+faster alternation. **D,** Released gate-voltage trajectories from physical
+experiment 1 show the measured bias-driven cycles. This is a descriptive
+reanalysis of published hardware data, not evidence that SDIL corrects the
+bias.